Senling Wang

Lecturer, Ehime University. Research: IC test/diagnosis, dependable systems, AI chip reliability, and Physical AI robotics.

English | Japanese

Research Vision

My research focuses on building dependable and intelligent systems spanning compute, chip, and robot. The goal is to support safety, reliability, and security in a super-smart society through IC testing, system-level dependability, secure design, and AI-chip reliability.

Functional Safety & Automotive Systems

Core Focus

  • Automotive functional safety with ISO 26262
  • Power-On Self-Test (POST) and online self-diagnosis
  • Multi-cycle testing and fault detection improvement

Key Contributions

  • Self-test architectures for automotive MCUs
  • Test point insertion methods for multi-cycle BIST
  • Capture-pattern control for fault detection degradation
  • Joint work with Renesas Electronics on automotive microcontroller testing

VLSI Testing, Diagnosis & Dependable Design

Core Focus

  • Low-power logic BIST and field test
  • Fault diagnosis for stuck-at, delay, and bridging faults
  • Testability design for complex systems
  • Machine learning-based test optimization

Key Contributions

  • Scan-out power reduction for multi-cycle BIST
  • Fault diagnosis considering hazards and path delay variation
  • Graph convolutional networks and reinforcement learning for test point selection
  • Spatio-temporal GCN models for functional fault impact prediction

Chiplet Systems & 3D Integration

Core Focus

  • 3D TSV testing and reliability
  • Chiplet system lifecycle management
  • Secure integrated testing for multi-chip systems
  • Software-Defined Secure Island technology

AI Chip Reliability & Edge Processing

Core Focus

  • Memory-based Reconfigurable Processors (MRP)
  • Set Operation Processors (SOP)
  • Edge AI reliability and test methods
  • Neural network implementation on resource-constrained devices

Secure Design & Lightweight Authentication

Core Focus

  • IoT device authentication and secure testing
  • PUF designs resistant to machine learning attacks
  • JTAG security and boundary scan protection
  • Lightweight protocols such as SAS-L

Education & Technology Transfer

  • Embedded systems development education
  • AI/Data Science practice-based learning
  • Semiconductor talent development
  • Technical outreach with local industry and universities

See the Teaching page for detailed course and mentoring activities.

International Collaboration

  • JSPS-NSFC bilateral exchange research
  • International collaboration on chiplet reliability
  • Publications in IEEE, ACM, IEICE, ATS, ITC-Asia, ETS, ITC-CSCC, and ICECC
  • Committee and review activities for conferences and journals